The present invention relates to a predistorter in a communication system, and more particularly, to a predistorter that is calibrated in the frequency domain.
The last stage of a transmitter is generally a power amplifier that dominates the power class of the transmitter, and the quality of the power amplifier significantly influences the system performance. Unfortunately, the input-output characteristics of the power amplifier are not always ideal: the power amplifier has a saturation region where the input-output characteristics become non-linear. In general, the power amplifier tends to become more non-linear as the input power level increases towards its maximum input power level. This kind of power amplifier will induce in-band and out-of-band distortions to signals having high peak-to-average power ration (PAPR), such as the orthogonal frequency division multiplexing (OFDM) signals, and will degrade the system performance since the OFDM signals have low tolerance and are sensitive to the nonlinear distortion of the power amplifier. The system therefore needs to make a tradeoff between efficiency and error vector magnitude (EVM).
Predistortion is a widely used and cost-saving technique for balancing off the nonlinearity of the power amplifier. FIG. 1 is a block diagram showing how a predistorter 112 and a power amplifier 114 are disposed in a transmitter 110. The predistorter 112 is expected to have a specific input-output characteristics that are inversely related to that of the power amplifier 114. Therefore, the overall system characteristics can become more linear. In order to achieve this goal, a feedback path 120 including a time-domain calibration circuit 122 is utilized to calibrate the input-output characteristics of the predistorter 112. The time-domain calibration circuit 122 compares the pre-distorted signal Spd output by the predistorter 112 and a feedback signal Sfb in the time domain to detect the input-output characteristics of the power amplifier 114, wherein the feedback signal Sfb is generated by a low noise amplifier (LNA) 124, a mixer 126, a filter 127 and an analog-to-digital converter (ADC) 128 (which operate reversely to the mixer 116, the filter 117 and the digital-to-analog converter (DAC) 118) processing the output signal Sout of the power amplifier 114. According to the detected characteristics of the power amplifier 114, the time-domain calibration circuit 122 adjusts the characteristics of the predistorter 112 as the inverse of that of the power amplifier 114.
However, the time-domain calibration circuit 122 needs to compensate for the group delay formed by those circuits in the feedback path 120 before it compares the pre-distorted signal Spd and the feedback signal Sfb. Otherwise, the performance of the predistorter 112 will be degraded due to the misalignment of the pre-distorted signal Spd and the feedback signal Sfb. The delay time is uncertain, and the estimated error must be less than 0.3 sample periods or the performance of the predistorter 112 will become unacceptable. It therefore requires complex and precise synchronization hardware in the time-domain calibration circuit 122 for group delay estimation and compensation.